Title | Multilayer Perceptron Based Stress Evolution Analysis under DC Current Stressing for Multi-segment Wires |
Author | |
Publication Years | 2022
|
DOI | |
Source Title | |
ISSN | 1937-4151
|
EISSN | 1937-4151
|
Volume | PPIssue:99Pages:1-1 |
Abstract | Electromigration (EM) is one of the major concerns in the reliability analysis of very large-scale integration (VLSI) systems due to the continuous technology scaling. Accurately predicting the time-to-failure of integrated circuits (ICs) becomes increasingly important for modern IC design. However, traditional methods are often not sufficiently accurate, leading to undesirable over-design especially in advanced technology nodes. In this article, we propose an approach using multilayer perceptrons (MLPs) to compute stress evolution in the interconnect trees during the void nucleation phase. The availability of a customized trial function for neural network training holds the promise of finding dynamic mesh-free stress evolution on complex interconnect trees under time-varying temperatures. Specifically, we formulate a new objective function considering the EM-induced coupled partial differential equations (PDEs), boundary conditions (BCs), and initial conditions to enforce the physics-based constraints in the spatial-temporal domain. The proposed model avoids meshing and reduces temporal iterations compared with conventional numerical approaches like finite element method. Numerical results confirm its advantages on accuracy and computational performance. |
Keywords | |
URL | [Source Record] |
Indexed By | |
Language | English
|
SUSTech Authorship | Others
|
Funding Project | National Key Research and Development Program of China[2019YFB2205005]
; Natural Science Foundation of China (NSFC)[62034007]
|
WOS Research Area | Computer Science
; Engineering
|
WOS Subject | Computer Science, Hardware & Architecture
; Computer Science, Interdisciplinary Applications
; Engineering, Electrical & Electronic
|
WOS Accession No | WOS:000920768600017
|
Publisher | |
EI Accession Number | 20222112149677
|
EI Keywords | Boundary conditions
; Complex networks
; Electromigration
; Forestry
; Integrated circuit design
; Integrated circuit interconnects
; Multilayer neural networks
; Multilayers
; Reliability analysis
; VLSI circuits
|
ESI Classification Code | Electricity: Basic Concepts and Phenomena:701.1
; Pulse Circuits:713.4
; Semiconductor Devices and Integrated Circuits:714.2
; Computer Systems and Equipment:722
; Woodlands and Forestry:821.0
|
Data Source | IEEE
|
PDF url | https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9778247 |
Citation statistics |
Cited Times [WOS]:0
|
Document Type | Journal Article |
Identifier | http://kc.sustech.edu.cn/handle/2SGJ60CL/347895 |
Department | SUSTech Institute of Microelectronics |
Affiliation | 1.Department of Micro/Nano Electronics, Shanghai Jiao Tong University. 2.Department of Electrical and Electronic Engineering, University of Hong Kong. 3.School of Microelectronics, Southern University of Science and Technology. |
Recommended Citation GB/T 7714 |
Tianshu Hou,Peining Zhen,Ngai Wong,et al. Multilayer Perceptron Based Stress Evolution Analysis under DC Current Stressing for Multi-segment Wires[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2022,PP(99):1-1.
|
APA |
Tianshu Hou.,Peining Zhen.,Ngai Wong.,Quan Chen.,Guoyong Shi.,...&Hai-Bao Chen.(2022).Multilayer Perceptron Based Stress Evolution Analysis under DC Current Stressing for Multi-segment Wires.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,PP(99),1-1.
|
MLA |
Tianshu Hou,et al."Multilayer Perceptron Based Stress Evolution Analysis under DC Current Stressing for Multi-segment Wires".IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems PP.99(2022):1-1.
|
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