中文版 | English
Title

A Reconfigurable Coprocessor for Simultaneous Localization and Mapping Algorithms in FPGA

Author
Publication Years
2022
DOI
Source Title
ISSN
1549-7747
EISSN
1558-3791
VolumePPIssue:99Pages:1-1
Abstract
Much effort overlaps in designing different hardware to implement different Simultaneous localization and mapping (SLAM) algorithms. In this brief, a reconfigurable architecture with dedicated instruction sets allows the coprocessor to satisfy the pose estimation of a sample class of the SLAM algorithms, featurebased or learning-based methods, which can be decomposed to basic common operations. Furthermore, a memory-reused strategy in instructions was designed to avoid the demand for temporary memory for complex operations. Finally, two parallel computing cores are implemented to perform matrix operations and special computation about the pose estimation in floatingpoint and fixed-point arithmetic. These contribute to the low hardware resource usage and memory requirement, as illustrated in the experimental results.
Keywords
URL[Source Record]
Indexed By
Language
English
SUSTech Authorship
First
EI Accession Number
20223512671921
EI Keywords
Conformal mapping ; Coprocessor ; Fixed point arithmetic ; Matrix algebra ; Reconfigurable architectures ; Reconfigurable hardware ; Robotics
ESI Classification Code
Semiconductor Devices and Integrated Circuits:714.2 ; Logic Elements:721.2 ; Computer Circuits:721.3 ; Computer Systems and Equipment:722 ; Robotics:731.5 ; Algebra:921.1 ; Numerical Methods:921.6
ESI Research Field
ENGINEERING
Scopus EID
2-s2.0-85136869712
Data Source
Scopus
PDF urlhttps://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9857612
Citation statistics
Cited Times [WOS]:0
Document TypeJournal Article
Identifierhttp://kc.sustech.edu.cn/handle/2SGJ60CL/401674
DepartmentSUSTech Institute of Microelectronics
Affiliation
1.School of Microelectronics, Southern University of Science and Technology, Shenzhen, China
2.Huazhong University of Science and Technology, Wuhan, China
3.School of Microelectronics, Southern University of Science and Technology and Engineering Research Center of Integrated Circuits for Next-Generation Communications, Ministry of Education, Southern University of Science and Technology, China
First Author AffilicationSUSTech Institute of Microelectronics
First Author's First AffilicationSUSTech Institute of Microelectronics
Recommended Citation
GB/T 7714
Tan,Yonghao,Deng,Huanshihong,Sun,Mengying,et al. A Reconfigurable Coprocessor for Simultaneous Localization and Mapping Algorithms in FPGA[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS,2022,PP(99):1-1.
APA
Tan,Yonghao.,Deng,Huanshihong.,Sun,Mengying.,Zhou,Minghao.,Chen,Yifei.,...&An,Fengwei.(2022).A Reconfigurable Coprocessor for Simultaneous Localization and Mapping Algorithms in FPGA.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS,PP(99),1-1.
MLA
Tan,Yonghao,et al."A Reconfigurable Coprocessor for Simultaneous Localization and Mapping Algorithms in FPGA".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS PP.99(2022):1-1.
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