| Title | A Low-Power Sparse Convolutional Neural Network Accelerator with Pre-Encoding Radix-4 Booth Multiplier |
| Author | |
| Publication Years | 2022
|
| DOI | |
| Source Title | |
| ISSN | 1558-3791
|
| Volume | PPIssue:99Pages:1-1 |
| Keywords | |
| URL | [Source Record] |
| SUSTech Authorship | Others
|
| Data Source | IEEE
|
| PDF url | https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9997088 |
| Citation statistics |
Cited Times [WOS]:0
|
| Document Type | Journal Article |
| Identifier | http://kc.sustech.edu.cn/handle/2SGJ60CL/419320 |
| Department | SUSTech Institute of Microelectronics |
| Affiliation | 1.Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan 2.School of Microelectronics, Southern University of Science and Technology, Shenzhen, China |
| Recommended Citation GB/T 7714 |
Quan Cheng,Liuyao Dai,Mingqiang Huang,et al. A Low-Power Sparse Convolutional Neural Network Accelerator with Pre-Encoding Radix-4 Booth Multiplier[J]. IEEE Transactions on Circuits and Systems II: Express Briefs,2022,PP(99):1-1.
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| APA |
Quan Cheng.,Liuyao Dai.,Mingqiang Huang.,Ao Shen.,Wei Mao.,...&Hao Yu.(2022).A Low-Power Sparse Convolutional Neural Network Accelerator with Pre-Encoding Radix-4 Booth Multiplier.IEEE Transactions on Circuits and Systems II: Express Briefs,PP(99),1-1.
|
| MLA |
Quan Cheng,et al."A Low-Power Sparse Convolutional Neural Network Accelerator with Pre-Encoding Radix-4 Booth Multiplier".IEEE Transactions on Circuits and Systems II: Express Briefs PP.99(2022):1-1.
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