Title | Voltage Reference With Corner-Aware Replica Selection/Merging for 1.4-mV Accuracy in Harvested Systems Down to 3.9 pW, 0.2 V |
Author | |
Publication Years | 2023
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DOI | |
Source Title | |
ISSN | 2169-3536
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Volume | 11Pages:3584-3596 |
Abstract | This paper introduces a voltage reference design able to operate over the wide supply voltage range from 1.8 V down to 0.2 V, and pW power. To mitigate the effect of global variations (e.g., die-to-die, wafer-to-wafer), the proposed NMOS-only architecture introduces process sensor-driven selection/merging of circuit replicas at boot (or run) time. Being the circuit replicas optimized for different process corners, their selection or merging fundamentally relaxes the traditionally conflicting design tradeoffs that affect the overall voltage accuracy in deep sub-threshold, while not requiring any testing-time trimming or non-volatile memory process option for low-cost applications. Measurements of a 180-nm test chip across 45 dice from different corner wafers demonstrate reliable operation down to 0.2 V with 3.9-pW power consumption at room temperature. The proposed process sensor-driven replica selection is shown to enable 1.6% V-REF process sensitivity (i.e., sigma\mu) , 34.9-mu V\degrees C) mean temperature coefficient, and 60.7- mu\V/V (0.14-%/V) mean line sensitivity across process corners. The resulting 1.4-mV overall absolute accuracy of the reference voltage across dice and corner wafers (1- sigma), voltage fluctuations (0.3 V) and temperature deviation (20 degrees C) is improved by 1.9x compared to the case without replica selection, and by 3- 15.4x compared to prior references with sub-nW consumption. |
Keywords | |
URL | [Source Record] |
Indexed By | |
Language | English
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SUSTech Authorship | Others
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Funding Project | Singapore Ministry of Education[MOE2019-T2-2 189]
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WOS Research Area | Computer Science
; Engineering
; Telecommunications
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WOS Subject | Computer Science, Information Systems
; Engineering, Electrical & Electronic
; Telecommunications
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WOS Accession No | WOS:000926563900001
|
Publisher | |
Data Source | IEEE
|
PDF url | https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10007824 |
Citation statistics |
Cited Times [WOS]:0
|
Document Type | Journal Article |
Identifier | http://kc.sustech.edu.cn/handle/2SGJ60CL/424571 |
Department | SUSTech Institute of Microelectronics |
Affiliation | 1.Department of Electrical and Computer Engineering (ECE), National University of Singapore, Queenstown, Singapore 2.School of Microelectronics, Southern University of Science and Technology, Shenzhen, China 3.Department of Computer Engineering, Modeling, Electronics and Systems Engineering, University of Calabria, Rende, Italy |
Recommended Citation GB/T 7714 |
Luigi Fassio,Longyang Lin,Raffaele De Rose,et al. Voltage Reference With Corner-Aware Replica Selection/Merging for 1.4-mV Accuracy in Harvested Systems Down to 3.9 pW, 0.2 V[J]. IEEE Access,2023,11:3584-3596.
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APA |
Luigi Fassio,Longyang Lin,Raffaele De Rose,Marco Lanuzza,Felice Crupi,&Massimo Alioto.(2023).Voltage Reference With Corner-Aware Replica Selection/Merging for 1.4-mV Accuracy in Harvested Systems Down to 3.9 pW, 0.2 V.IEEE Access,11,3584-3596.
|
MLA |
Luigi Fassio,et al."Voltage Reference With Corner-Aware Replica Selection/Merging for 1.4-mV Accuracy in Harvested Systems Down to 3.9 pW, 0.2 V".IEEE Access 11(2023):3584-3596.
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