中文版 | English
Title

Fabrication of CMUTs Using Sacrificial Release Process with Ashing Assisted Polysilicon Release

Author
DOI
Publication Years
2022
Conference Name
2022 International Conference on Biomedical and Intelligent Systems, IC-BIS 2022
ISSN
0277-786X
EISSN
1996-756X
ISBN
9781510660212
Source Title
Volume
12458
Conference Date
June 24, 2022 - June 26, 2022
Conference Place
Chengdu, China
Author of Source
Academic Exchange Information Center (AEIC)
Publisher
Abstract
Capacitive Micromachined Ultrasonic Transducer (CMUT) is a type of ultrasonic transducer that can be applied in many fields like chemical and mechanical sensing, physical imaging, and bio-imaging. Sacrificial layer release is one of the fabrication methods and cavity releasing is the key part of this method. The stress of the sacrificial material is one of the causes making membranes break in this procedure. The previous studies had a phospho-silicide-glass (PSG) layer deposited between polysilicon sacrificial layer and silicon nitride membrane with LPCVD partially solved the problem. However, its processing temperature is relatively high, which makes it not compatible with CMOS integrated circuits (ICs). This work fabricated CMUTs in the sacrificial layer release process, with polysilicon as the main sacrificial layer. Utilizing chemical reaction of polysilicon in ashing process, a thin oxide was formed between the sacrificial layer and membrane while removing the remaining photoresist with ashing. The result showed that it could also help produce large membranes with a lower processing temperature, which can be more compatible with CMOS ICs. After fabrication, the impedance of an element with 100 µm diameter cells was measured to be several hundred ohms in air with 30 V bias voltage and the resonance frequency was 4.7 MHz.
© 2022 SPIE. All rights reserved.
SUSTech Authorship
Others
Language
English
Indexed By
Funding Project
This fabrication was performed at the Micro and Nanofabrication Facility at the Southern University of Science and Technology (SUSTech), Shenzhen, China. This work was funded by the National Key R&D Program of China (No. 2020YFB1313502) and funded by the Shenzhen-Hong Kong-Macau S&T Program (Category C) of SZSTI (SGDX20201103094002009) and funded by the University of Macau (File no. MYRG2019-00056-AMSV, MYRG2020-00098-FST) and funded by The Science and Technology Development Fund, Macau SAR (File no. 0144/2019/A3, 0022/2020/AFJ, SKL-AMSV (FDCT-funded), SKL-AMSV-ADDITIONAL FUND, SKL-AMSV(UM)-2020-2022).
EI Accession Number
20230113327261
EI Keywords
CMOS integrated circuits ; Fabrication ; Photoresists ; Polycrystalline materials ; Silicides ; Silicon nitride ; Temperature ; Ultrasonic transducers
ESI Classification Code
Nonferrous Metals and Alloys excluding Alkali and Alkaline Earth Metals:549.3 ; Thermodynamics:641.1 ; Semiconductor Devices and Integrated Circuits:714.2 ; Ultrasonic Devices:753.2 ; Chemical Products Generally:804 ; Inorganic Compounds:804.2 ; Coating Materials:813.2 ; Crystalline Solids:933.1
Data Source
EV Compendex
Citation statistics
Cited Times [WOS]:0
Document TypeConference paper
Identifierhttp://kc.sustech.edu.cn/handle/2SGJ60CL/519769
DepartmentDepartment of Electrical and Electronic Engineering
Affiliation
1.Institude of Mircroelectronic, University of Macau, Avenida da Universidade, Taipa, China
2.Department of Electrical and Computer Engineering, Faculty of Science and Technology, University of Macau, Avenida da Universidade, Taipa, China
3.Department of Electrical and Electronic Engineering, Collage of Engineering, Southern University of Science and Technology, Shenzhen, China
Recommended Citation
GB/T 7714
Che, U. Kin,Liu, Xin,Yu, Yuanyu,et al. Fabrication of CMUTs Using Sacrificial Release Process with Ashing Assisted Polysilicon Release[C]//Academic Exchange Information Center (AEIC):SPIE,2022.
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