Subpixel Interpolation Disparity Refinement for Semi-Global Matching

Yunhao Ma; Xiwei Fang; Pingcheng Dong; Xinyu Guan; Ke Li; Lei Chen; Fengwei An

10.1109/APCCAS55924.2022.10090384

2022

IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

978-1-6654-5080-5

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

105-109

11-13 Nov. 2022

Shenzhen, China

345 E 47TH ST, NEW YORK, NY 10017 USA

IEEE

Semi-Global Matching (SGM) algorithms and their corresponding hardware accelerators, which focus on stereo matching, have been developed in the last few years. However, the interpolation for disparity is much indispensable for real-world applications but still remains refining. This work presents a pixel-level pipeline architecture for the disparity refinement for SGM in case of computing disparity, which refines disparity through subpixel interpolation with an optimized cosine look up table and a compute-friendly parallel divider. The hardware architecture based on optimization algorithms has reached a error rate of only 6.33% for tradition background and 7.30% for occlusion condition, achieved in real-time FPGA as well.

Semi-global Matching subpixel interpolation cosine look up table divider FPGA

First

English

CPCI-S

Computer Science ; Engineering

Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic

WOS:000987045300023

IEEE

School of Microelectronics, Southern University of Science and Technology, Shenzhen, China

Yunhao Ma,Xiwei Fang,Pingcheng Dong,et al. Subpixel Interpolation Disparity Refinement for Semi-Global Matching[C]. 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE,2022:105-109.