An Energy-Efficient Mixed-Bit ReRAM-based Computing-in-Memory CNN Accelerator with Fully Parallel Readout

Dingbang Liu; Wei Mao; Haoxiang Zhou; Jun Liu; Qiuping Wu; Haiqiao Hong; Hao Yu

10.1109/APCCAS55924.2022.10090365

2022

IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

978-1-6654-5080-5

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

1-5

11-13 Nov. 2022

Shenzhen, China

345 E 47TH ST, NEW YORK, NY 10017 USA

IEEE

Computing-In-memory (CIM) accelerators have the characteristics of storage and computing integration, which has the potential to break through the limit of Moore's law and the bottleneck of Von-Neumann architecture. However, the performance of CIM accelerators is still limited by conventional CNN architectures and inefficient readouts. To increase energy-efficient performance, optimized CNN model is required and low-power fully parallel readout is necessary for edge-computing hardware. In this work, an ReRAM-based CNN accelerator is designed. Mixed-bit 1 similar to 8-bit operations are supported by bitwidth configuration scheme for implementing Neural Architecture Search (NAS)-optimized multi-bit CNNs. Besides, energy-efficient fully parallel readout is achieved by variation-reduction accumulation mechanism and low-power readout circuits. Benchmarks show that the proposed ReRAM accelerator can achieve peak energy efficiency of 2490.32 TOPS/W for 1-bit operation and average energy efficiency of 479.37 TOPS/W for 1 similar to 8-bit operations when evaluating NAS-optimized multi-bitwidth CNNs.

Mixed-bit CNN accelerator ReRAM CIM fully parallel readout NAS energy-efficient

First

English

CPCI-S

National Key Research and Development Program of the Ministry of science and technology[2021YFE0204000] ; Guangdong Provincial Key Laboratory Program from the Department of Science and Technology of Guangdong Province[2021B1212040001] ; Shenzhen Science and Technology Program[KQTD20200820113051096]

Computer Science ; Engineering

Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic

WOS:000987045300108

IEEE

School of Microelectronics Southern University of Science and Technology, Shenzhen, China

Dingbang Liu,Wei Mao,Haoxiang Zhou,et al. An Energy-Efficient Mixed-Bit ReRAM-based Computing-in-Memory CNN Accelerator with Fully Parallel Readout[C]. 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE,2022:1-5.