中文版 | English
Title

原位SiN冒层GaN基异质结构器件及其制备方法

Alternative Title
In-situ SiN cap layer GaN-based heterostructure device and preparation method thereof
Author
First Inventor
杜方洲
Original applicant
南方科技大学
First applicant
南方科技大学
Address of First applicant
518000 广东省深圳市南山区西丽学苑大道1088号
Current applicant
南方科技大学
Address of Current applicant
518000 广东省深圳市南山区西丽学苑大道1088号 (广东,深圳,南山区)
First Current Applicant
南方科技大学
Address of First Current Applicant
518000 广东省深圳市南山区西丽学苑大道1088号 (广东,深圳,南山区)
Application Number
CN202210556596.8
Application Date
2022-05-18
Open (Notice) Number
CN115036210A
Date Available
2022-09-09
Status of Patent
实质审查
Legal Date
2022-09-30
Subtype
发明申请
SUSTech Authorship
First
Abstract
本申请提供原位SiN冒层GaN基异质结构器件及其制备方法,涉及半导体技术领域,该器件的原位SiN冒层的刻蚀方法先使用碳氟化合物等离子体对原位SiN冒层进行改性,再使用Ar等离子体轰击去除,通过两步连续循环原子层刻蚀工艺精确控制刻蚀深度,降低表面形貌刻蚀损伤,得到光滑的刻蚀表面,有效降低原位SiN冒层选区刻蚀后表面的表面态、缺陷密度、缺陷尺寸及GaN基异质结构的电学性能损失,优化器件欧姆电极制备工艺,让原位SiN冒层在GaN基异质结构器件制备领域得到更广泛的应用。
Other Abstract
The invention provides an in-situ SiN cap layer GaN-based heterostructure device and a preparation method thereof, and relates to the technical field of semiconductors, and according to an etching method of an in-situ SiN cap layer of the device, the in-situ SiN cap layer is modified by using fluorocarbon plasma and then is bombarded and removed by using Ar plasma, the etching depth is accurately controlled through a two-step continuous circulation atomic layer etching process, and the GaN-based heterostructure device with the in-situ SiN cap layer is obtained. According to the method, the surface morphology etching damage is reduced, the smooth etching surface is obtained, the surface state, the defect density and the defect size of the surface of the in-situ SiN cap layer after selective etching and the electrical property loss of the GaN-based heterostructure are effectively reduced, the device ohmic electrode preparation process is optimized, and the in-situ SiN cap layer is more widely applied to the field of GaN-based heterostructure device preparation.
CPC Classification Number
H01L21/3065 ; H01L29/401 ; H01L29/452 ; H01L29/66462 ; H01L21/263 ; H01L29/7786 ; Y02P70/50
IPC Classification Number
H01L21/263 ; H01L21/3065 ; H01L21/28 ; H01L29/45 ; H01L21/335 ; H01L29/778
INPADOC Legal Status
(ENTRY INTO FORCE OF REQUEST FOR SUBSTANTIVE EXAMINATION)[2022-09-30][CN]
INPADOC Patent Family Count
1
Extended Patent Family Count
1
Priority date
2022-05-18
Patent Agent
宋家会
Agency
北京超凡宏宇专利代理事务所(特殊普通合伙)
URL[Source Record]
Data Source
PatSnap
Document TypePatent
Identifierhttp://kc.sustech.edu.cn/handle/2SGJ60CL/533403
DepartmentSUSTech Institute of Microelectronics
南方科技大学-香港科技大学深港微电子学院筹建办公室
Recommended Citation
GB/T 7714
杜方洲,于洪宇,汪青,等. 原位SiN冒层GaN基异质结构器件及其制备方法.
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